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DARPA project for cryogenic cables and connectors for quantum computing

Cryogenic electronics is important for a growing number of applications, including superconducting classical computing, superconducting quantum computing and quantum annealing, and superconducting single-photon detector arrays. One of the more difficult aspects about developing a successful superconducting electronics technology at very low temperatures (~10 mK) is the lack of robust commercial input/output data cables and connectors.


Cryogenic cables are for use in low temperatures and are made of low-thermal-conductivity metal materials on center and outer conductors, which minimize affect of low temperatures from outside the cables. Existing solutions are often bespoke and developed “in-house”, or are very low-density coaxial cables. When they are available commercially, connectorized cryogenic cables are often only available from non-US vendors. High-quality cryogenic data cables are an extremely challenging engineering problem because of the number of key performance metrics that must be simultaneously optimized. High-quality cables should be simultaneously low loss and low heat load –goals that are often directly at odds. High-quality cable solutions should also be high density (large number of channels per cable and per cryo-system) but also be very low crosstalk. These competing requirements will likely demand a creative cabling and connector solution.


Officials of the U.S. Defense Advanced Research Projects Agency (DARPA) in Arlington, Va., issued a solicitation in August 2021 for the High Density Connectorized Cryogenic Cables project. The goal is to create a new type of high-density data cable for superconducting electronics applications with high density, low attenuation, low crosstalk, and low heat load.



The goal of the “High-density connectorized cryogenic cables” SBIR program is to develop cables that simultaneously excel at each of the performance metrics below, and seed a commercial technology that will enable a new generation of cryogenic information processing technologies. More specifically, proposed designs (Phase I) and implementations (Phase II) should meet the following specifications:  Cables should have 8 to 16 channels per cable, with 128 to 256 channels per 4-inch vacuum feedthrough; -40 to -50 decibels of normalized crosstalk; 1.5 to 5 decibels per meter of insertion loss; and 2 to 5 nanowatts of heat load at 20 millikelvin.


Researchers are interested in how well cables can scale to higher connector densities, longer cable lengths, maximum operating frequencies; insertion loss at temperatures as high as room temperature; heat load at temperatures from 4 to 50 Kelvin; and signal phase matching within cables and cable-to-cable. In addition, researchers want to know the cable’s minimum bend radius, customer-defined impedance values; compatibility with integrated passive components and cryogenic vacuum connections; mean time between failures at cryogenic temperatures; mean time between failures at mean thermal cycles; and expected commercial prices.


Phase-one contractors will perform a feasibility and design study, and produce a technical design for a high-quality cryogenic cable, and provide experimental or numerical evidence that their proposed solution will meet requirements. DARPA may select performers from phase one for continuation into phase two to develop, manufacture, and characterize designs, and lay the groundwork for a new commercial cryogenic cabling solution.


Dual Use Applications (Phase III)

Dual-use (both commercial and military) applications for cryogenics information processing and electronics systems include ultra-low-energy-efficiency classical supercomputers. Likely candidates include large-scale data centers for machine learning or other classical computing applications. In addition, commercial quantum annealing and quantum computing solutions require high-quality, high-density superconducting input/output cables. In addition, new classes of superconducting single-photon detector arrays, if scaled up to the size of conventional imaging arrays, will likely require significant cryogenic input/output cable bandwidth with the same type of exacting
requirements needed for cryogenic computing applications.



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