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Ever-growing data generation driven by mobile devices, the cloud, the IoT , and big data, as well as novel AI applications, all part of the megatrends, requires continuous advancements in memory technologies.
RRAM is a nonvolatile memory that is similar to PCM. The technology concept is that a dielectric, which is normally insulating, can be made to conduct through a filament or conduction path formed after application of a sufficiently high voltage. This memristor technology is considered as potentially a strong candidate to challenge NAND Flash. At 16 Gb the Micron-Sony RRAM has the highest density commercialized among emerging NVM technologies.
Because of its greater density, RRAM will be able to use silicon wafers that are half the size used by current NAND flash fabricators. In a single chip, it has nearly 10 times the capacity of NAND flash and uses 20 times less power to store a bit of data. It also sports 100 times lower latency than NAND flash, meaning performance is massively improved, according to Crossbar.
AI has been present in mobile phones for a while now, powering voice assistant features like Siri or the Google Assistant, for example. However, in the previous generation of phones, AI was cloud-based and required an internet connection to be accessed. What is different about AI on the new generation of smartphones will combine the cloud-based AI to built-in AI engines on the hardware. This novelty has been announced by tech giants such as Google, Apple and Huawei.
It will do, through sparse processing, is recognize images, voices and language and process them like data. This means that phones like the Mate 10 will be able to make decisions and optimise their performance based on what they have learnt from being used. In-device AI also promises a better integration of the system with hardware such as cameras, microphones and batteries.
Machine learning is all about having the right and a diverse amount of data. Mobile phones would require large memory to store lots of examples for system training. “There’s a lot of data that you use and supply on your phone that is unique to you, that identifies you. The systems that can do an intelligent analysis of data can determine lots of things about you that you may or may not wish to be determined: your behaviours, your preferences, your health,” added Professor Robertson.
Researchers at CEA-Leti and Stanford University have demonstrated a chip that integrates multiple-bit non-volatile memory (NVM) resistive RAM (ReRAM) with silicon computing units and new memory resiliency features that provide 2.3× the capacity of existing ReRAM. Target applications include energy-efficient, smart-sensor nodes to support artificial intelligence on the internet of things or edge AI.
“The biggest challenge facing engineers for AI today is overcoming the memory speed and power bottleneck in the current architecture to get faster data access while lowering the energy cost,” Dubois said in a press release. Embedding ReRAM in a processor should give that fast access and energy savings, he argues. The company is demonstrating a test chip at the Embedded Vision Summit next week in Santa Clara, Calif. It’s capable of running face recognition and license plate recognition, says Dubois. And it can train to recognize new faces without help from the cloud.
Crossbar Pushes Resistive RAM Into Embedded AI
Resistive RAM technology developer Crossbar says it has inked a deal with aerospace chipmaker Microsemi, allowing the latter to embed Crossbar’s nonvolatile memory on future chips. The move follows the selection of Crossbar’s technology by a leading foundry for advanced manufacturing nodes. Crossbar is counting on resistive RAM (ReRAM) to enable artificial intelligence systems whose neural networks are housed within the device rather than in the cloud.
ReRAM is a variant of the memristor, a nonvolatile memory device whose resistance can be set or reset by a pulse of voltage. The variant that Crossbar qualified for advanced manufacturing is called a filament device. It’s built within the layers above a chip’s silicon, where the IC’s interconnects go, and it’s made up of three layers: from top to bottom—silver, amorphous silicon, and tungsten. Voltage across the amorphous silicon causes a filament of silver atoms to cross the gap to the tungsten, making the memory cell conductive. Reversing the voltage pushes the silver back into place, cutting off conduction.
“The filament itself is only three to four nanometers wide,” says Sylvain Dubois, vice president of marketing and business development at Crossbar. “So the cell itself will be able to scale below 10 nanometers.” What’s more, the ratio between the current that flows when the device is on and when it is off is 1,000 or higher. Competitors for a spot as an embedded nonvolatile memory, such as magnetic random-access memory (MRAM), are orders of magnitude smaller.
With the foundry backing, Crossbar is hoping to market embedded ReRAM as a key to moving artificial intelligence systems into small or mobile devices such as surveillance cameras or drones. “AI is going to the edge,” says Dubois. “You cannot rely on the cloud for assisted driving or autonomous driving or even for a mobile phone.”
CEA-Leti and Stanford Target Edge-AI Apps with Breakthrough NVM Memory Cell
Researchers at CEA-Leti and Stanford University have developed the world’s first circuit integrating multiple-bit non-volatile memory (NVM) technology called Resistive RAM (RRAM) with silicon computing units, as well as new memory resiliency features that provide 2.3-times the capacity of existing RRAM. Target applications include energy-efficient, smart-sensor nodes to support artificial intelligence on the Internet of Things, or “edge AI”.
The proof-of-concept chip has been validated for a wide variety of applications (machine learning, control, security). Designed by a Stanford team led by Professors Subhasish Mitra and H.-S. Philip Wong and realized in CEA-Leti’s cleanroom in Grenoble, France, the chip monolithically integrates two heterogeneous technologies: 18 kilobytes (KB) of on-chip RRAM on top of commercial 130nm silicon CMOS with a 16-bit general-purpose microcontroller core with 8KB of SRAM.
The new chip delivers 10-times better energy efficiency (at similar speed) versus standard embedded FLASH, thanks to its low operation energy, as well as ultra-fast and energy-efficient transitions from on mode to off mode and vice versa. To save energy, smart-sensor nodes must turn themselves off. Non-volatility, which enables memories to retain data when power is off, is thus becoming an essential on-chip memory characteristic for edge nodes. The design of 2.3 bits/cell RRAM enables higher memory density (NVM dense integration) yielding better application results: 2.3x better neural network inference accuracy, for example, compared to a 1-bit/cell equivalent memory.
The technology was presented on Feb. 19, at the International Solid-State Circuits Conference (ISSCC) 2019 in San Francisco in a paper titled, “A 43pJ/Cycle Non-Volatile Microcontroller with 4.7μs Shutdown/Wake-up Integrating 2.3-bit/Cell Resistive RAM and Resilience Techniques”.
But NVM technologies (RRAM and others) suffer from write failures. Such write failures have catastrophic impact at the application level and significantly diminish the usefulness of NVM such as RRAM. The CEA-Leti and Stanford team created a new technique called ENDURER that overcomes this major challenge. This gives the chip a 10-year functional lifetime when continuously running inference with the Modified National Institute of Standards and Technology (MNIST) database, for example.
“THE STANFORD/CEA-LETI team demonstrated a complete chip that stores multiple bits per on-chip rram cell. Stored information is correctly processed when compared with previous demonstrations using standalone rram or a few cells in a ram array,” said Thomas Ernst, Leti’s chief scientist for silicon components and technologies. “This multi-bit storage improves the accuracy of neural network inference, a vital component of ai.”
Mitra said the chip demonstrates several industry firsts for RRAM technology. These include new algorithms that achieve multiple bits-per-cell RRAM at the full memory level, new techniques that exploit RRAM features as well as application characteristics to demonstrate the effectiveness of multiple bits-per-cell RRAM at the computing system level, and new resilience techniques that achieve a useful lifetime for RRAM-based computing systems.
“This is only possible with a unique team with end-to-end expertise across technology, circuits, architecture, and applications,” he said. “the Stanford Systemx alliance and the carnot chair of excellence in nanosystems at cea-leti enabled such a unique collaboration.”
Rice University RRAM technology
A research team from Rice University has produced a nonvolatile, resistive random access memory (RRAM) technology that provides high-density storage in crossbar memory arrays. Developed in the laboratory of Professor James Tour, the solid-state memory is based on tantalum oxide and has silicon oxide as the dielectric component.
The cells are built with layers of graphene, tantalum, and nanoporous tantalum oxide, all of which are pressed in between two platinum electrode crossbars. The research team found that applying a control voltage to the 250-nanometer-think stack creates addressable bits where the layers meet.
Each 3D memory cell supports up to 162 gigabits or 20 gigabytes of information, using highly resistive materials to increase the density of the memory between each crossbar. This would enable future smart phones to store upto terabyte of memory compared to 64 GB at present, allowing us to store vast amounts of data — videos, movies, games — on our phones.
“Our technology is the only one that satisfies every market requirement, both from a production and a performance standpoint, for nonvolatile memory,” Tour said. “It can be manufactured at room temperature, has an extremely low forming voltage, high on-off ratio, low power consumption, nine-bit capacity per cell, exceptional switching speeds and excellent cycling endurance.” Imec and Panasonic Corp. have fabricated a 40nm TaOx-based RRAM (resistive RAM) technology with precise filament positioning and high thermal stability. This breakthrough result paves the way to realizing 28nm embedded applications.
