The advances in space demand next generation of space data and signal processing requirements High speed computers enable on-board image processing capability reduce the amount of bandwidth required to downlink the enormous images associated with emerging sensor developments. Onboard processing allows a complete image to be down linked directly to the battlefield commander, providing the operational forces with real-time imagery. This would reduce the dependence on the numerous ground stations.
An additional benefit of the high-performance space computer is the capacity to provide the user with autonomous mission operation, going beyond spacecraft control to increasingly independent information gathering, multispectral and hyperspectral data analysis, and data dissemination.The increased satellite autonomy and processing capability will dramatically improve satellite system performance and decrease the support infrastructure while providing needed information directly to end users.
Scale Space Applications with COTS-to-Radiation-Tolerant and Radiation-Hardened Arm® Core MCUs
Microchip Technology Inc. (Nasdaq: MCHP) has introduced the space industry’s first Arm®-based microcontrollers (MCUs) that combine the low-cost and large ecosystem benefits of Commercial Off-the-Shelf (COTS) technology with space-qualified versions that have scalable levels of radiation performance. Based on the automotive-qualified SAMV71, the SAMV71Q21RT radiation-tolerant and SAMRH71 radiation-hardened MCUs implement the widely deployed Arm® Cortex®-M7 System on Chip (SoC), enabling more integration, cost reduction and higher performance in space systems.
While the SAMV71Q21RT’s radiation performance is ideal for NewSpace applications such as Low Earth Orbit (LEO) satellite constellations and robotics, the SAMRH71 offers the radiation performance suited for more critical sub-systems like gyroscopes and star tracker equipment. The SAMV71Q21RT rad-tolerant device ensures an accumulated TID of 30Krad (Si) with latch up immunity and is nondestructive against heavy ions. Both devices are fully immune to Single-Event Latchup (SEL) up to 62 MeV.cm²/mg.
The SAMRH71 radiation-hardened MCU is designed specifically for deep space applications with the following targeted radiation performances:
Accumulated TID of more than 100 Krad (Si)
No Single Event Upset (SEU) Linear Energy Transfer (LET) up to 20 MeV.cm²/mg, without system mitigation
Designed for No Single-Event Functional Interrupts (SEFI), which secures all memories’ integrity
As the industry’s first radiation-tolerant and radiation-hardened Arm Cortex-M7 MCUs, the SAMV71Q21RT and SAMRH71 bring a proven SoC architecture from the automotive market to aerospace applications,” said Bob Vampola, vice president of Microchip’s aerospace and defense business unit. “Leveraging Microchip’s COTS-to-radiation-tolerant and radiation-hardened approach, the devices allow designers to begin prototyping immediately at a relatively limited cost before moving forward with qualified parts.”
BAE Systems develops Next-generation hardened computers
BAE Systems, a world leader in radiation-hardened computers and processors for satellites and spacecraft, announced a new generation of its flagship space computer that combines fast performance and extreme resiliency to enable previously impossible missions in the harsh environment of space.
The new RAD5545TM single-board computer (SBC) provides next-generation spacecraft with the high-performance onboard processing capacity needed to support future space missions — from weather and planetary exploration to communications, surveillance, tracking, and national security missions. The RAD5545 SBC delivers exponential improvements in size, speed, and power-efficiency over its proven predecessor, the RAD750® SBC.“The RAD5545 SBC is the next step in the evolution of space computers. It’s the most technologically advanced radiation-hardened, general-purpose processor for space applications,” said Dave Rea, director of On-board Processing and Advanced Technology at BAE Systems.
A single RAD5545 SBC replaces multiple cards on previous generations of spacecraft. It combines high performance, large amounts of memory, and fast throughput to improve spacecraft capability, efficiency, and mission performance. With its improved computational throughput, storage, and bandwidth, it will provide spacecraft with the ability to conduct new missions, including those requiring encryption processing, multiple operating systems, ultra high-resolution image processing, autonomous operation, and simultaneous support for multiple payloads — missions that were impossible with previous single-board computers.
The RAD5545 SBC is produced at the company’s facility in Manassas, Virginia. The facility is a U.S. Department of Defense Category 1A Microelectronics Trusted Source.BAE Systems’ radiation-hardened electronics have been onboard satellites and spacecraft for almost 30 years, delivering long-lasting computing power in extreme environmental conditions. The company has provided more than 900 computers on over 300 satellites, and has provided the computers that power key national space assets, including some that are hundreds of millions of miles away from Earth.
RAD750® radiation-hardened PowerPC microprocessor
The RAD750® radiation-hardened PowerPC microprocessor is the best space microprocessor available today by any selection criterion —performance, cost, availability, or flight heritage. Based on re-engineered commercial technology, it is a licensed, rad-hard version of the IBM PowerPC 750. With nearly 10 times the performance of current rad-hard space processors, the RAD750® processor is the most powerful radiation-hardened general-purpose microprocessor ever developed. This chip’s architecture supports the industry leading performance of >400 MIPS operating at 200 MHz. The first RAD750® flight units were launched in 2005 on Deep Impact, XSS-11, and Mars Reconnaissance Orbiter missions. Since those first flights, 28 additional RAD750® microprocessors have been launched.
NASA, Microchip to develop next-gen spaceflight computing processor
NASA has selected US-based Microchip Technology to develop a high-performance space flight computing (HPSC) processor that will provide at least 100 times the computational capacity of current spaceflight computers.
The next-generation processor would advance all types of future space missions, from planetary exploration to lunar and Mars surface missions.
“This cutting-edge spaceflight processor will have a tremendous impact on our future space missions and even technologies here on Earth,” said Niki Werkheiser, director of technology maturation within the Space Technology Mission Directorate at NASA Headquarters in Washington, in a statement.
“This effort will amplify existing spacecraft capabilities and enable new ones and could ultimately be used by virtually every future space mission, all benefiting from more capable flight computing,” Werkheiser added.
Microchip will architect, design, and deliver the HPSC processor over three years, with the goal of employing the processor on future lunar and planetary exploration missions.
Microchip’s processor architecture will significantly improve the overall computing efficiency for these missions by enabling computing power to be scalable, based on mission needs. The design also will be more reliable and have a higher fault tolerance.
The platform “will deliver comprehensive Ethernet networking, advanced artificial intelligence/machine learning processing and connectivity support while offering unprecedented performance gain, fault-tolerance, and security architecture at low power consumption”, Samimi added.
Microchip’s HPSC processor may also be useful to other government agencies and applicable to other types of future space missions to explore our solar system and beyond, from Earth science operations to Mars exploration and human lunar missions.
The processor could potentially be used for commercial systems on Earth that require similar mission critical edge computing needs as space missions and are able to safely continue operations if one component of the system fails.
These potential applications include industrial automation, edge computing, time-sensitive ethernet data transmission, artificial intelligence, and even Internet of Things gateways, which bridge various communication technologies.
Air Force, NASA HPSC program to develop radiation-hardened ARM processor for next-generation space computing
Officials of the NASA Goddard Space Flight Center in Greenbelt, Md., had issued the final solicitation for the High Performance Spaceflight Computing (HPSC) Processor Chiplet program for NASA and U.S. Air Force manned and unmanned spacecraft. This four-year project is expected to deliver a next-generation rad-hard space processor based on the ARM processor architecture to provide optimal power-to-performance for upgradeability, software availability, ease of use, and cost.
Today’s radiation-hardened space processors typically are single-processor systems based on existing commercial or military computers. they operate at maximum required throughput, fault tolerance, and power levels. Air Force and NASA space experts, however, say they anticipate future missions that will require an increase in throughput and wider variations in throughput, fault tolerance, and power levels. There is need for industry to develop a next-generation radiation-hardened, general-purpose, multi-core processor to meet on-board computing needs of future manned spacecraft and space robots. To do this they need a new space processor design that will provide orders of magnitude improvement in performance and performance-to-power ratio as well as the ability dynamically to set the power-throughput-fault tolerance operating point.
Space computing tasks of the HPSC processor will include command and data handling, guidance navigation and control, and communications like software-defined radio; human assist, data representation, and cloud computing; high-rate real-time sensor data processing; and autonomy and science processing.The software infrastructure for the HPSC Chiplet is envisioned to support both symmetric and asymmetric processing, and support both real-time operating systems and Unix/Linux based parallel processing. This infrastructure is also envisioned to support hierarchical fault tolerance, ranging from single Chiplet missions to multi-Chiplet highly redundant human missions. This software infrastructure is a contract deliverable.
The HPSC project also will use Radiation Hard By Design (RHBD) standard cell libraries, as well as the ARM A53 processor with its internal NEON single instruction, multiple data (SIMD) design. Experts say a heterogeneous multi-core architectures using many different processor core types will not provide the best possible return on investment.Applications for the HPSC processor will include military surveillance and weapons systems, human-rated spacecraft, habitats and vehicles, and robotic science and exploration platforms. System applications range from small satellites to large flagship-class missions.
Fault tolerance management middleware will enable the processor to detect and log errors; remove services likely to experience hard failures; respond to uncorrectable errors; and implement n-modular redundancy, checkpoint/rollback, or other high-level fault tolerance.This four-year project will consist of a preliminary design phase, a detailed design phase, a fabrication phase, and a test and characterization phase. The project should lead to a processor behavioral model, prototype processors, processor evaluation boards, and system software.A key goal for the HPSC project is the ability to trade dynamically between processing throughput, power consumption, and fault tolerance. The HPSC processor architecture sometimes will be inside a dedicated spaceflight computer, and sometimes may be embedded in a science instrument or spaceflight subsystem.
Next Generation Space Processor (NGSP) study
Collaborative discussions with the Air Force Research Laboratory (AFRL) determined that many of NASA’s future onboard computing needs have commonality with the USAF’s future needs, and that a radiation-hardened, general purpose multi-core processor of the kind envisioned by NASA would also be relevant to the USAF.
Based on these shared interests, NASA partnered with AFRL on a Next Generation Space Processor (NGSP) study. This study, led by AFRL, engaged industry to assess, in greater detail, USAF’s requirements, compare USAF’s requirements with NASA’s previously defined detailed requirements, 3 develop processor architectures that would satisfy the superset of NASA/USAF requirements and evaluate these architectures against a set of government provided benchmarks.
The NGSP study provided the government team valuable guidance regarding the optimal architecture for a future spaceflight processing device:
– The use of COTS IP (specifically ARM based IP) provides optimal power-to performance, extensibility, evolvability, software availability, ease of use, and cost.
– The use of Radiation Hard By Design (RHBD) standard cell libraries provides required radiation tolerance.
– The augmentation of RHBD with higher-level fault tolerance techniques improves reliability.
– The use of the ARM A53 processor with its internal NEON Single Instruction, Multiple Data (SIMD) is sufficient for most near term applications.
– Heterogeneous multi-core architectures using multiple processor core types do not provide the optimum return on investment at this time.
– Architectural flexibility such as the ability to turn on/off cache coherency and use of L3 cache, as well as the ability to dynamically depower unused cores, including memory and Input/Output (I/O) interfaces, is useful to enable setting of optimal power: performance: fault tolerance operating point.
References and Resources also include:
“32-bit Radiation-Hardened Computers for Space,” Captains Joseph Nedeau and Dan King, http://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=687913