The explosion of connected devices and digital services is generating massive amounts of new data. Digital world is growing exponentially from 4.4 zettabytes (1021 or 1 sextillion bytes) of digital data created in 2013 to an expected 44 zettabytes by 2024. To make this data useful, it must be stored and analyzed very quickly, creating challenges for service providers and system builders who must balance cost, power and performance trade-offs when they design memory and storage solutions.
It’s far easier to generate zettabytes of data than to manufacture zettabytes of data storage capacity. A wide gap is emerging between data generation and hard drive and flash production. It is estimated that By 2020, demand for capacity will outstrip production by six zettabytes, or nearly double the demand of 2013 alone.
With the exponential growth in the capacity of information generated and the emerging need for data to be stored for prolonged period of time, there emerges a need for a storage medium with high capacity, high storage density, and possibility to withstand extreme environmental conditions.
Digital information can be stored in different types of device depending on the use and how frequently the data need to be accessed. Hard disk drives are magnetic devices that allow storing terabytes of data for long time, however speed of access to the data is relatively slow (a few milliseconds). On the other hand, data that are being used by a computer processor to perform an operation need to be accessed on a much faster timescale (nanoseconds). Silicon-based semiconductor memories are categorized into volatile and nonvolatile memories.
Volatile memories, such as static random-access memory (SRAM) and dynamic random-access memory (DRAM), need voltage supply to hold their information while nonvolatile memories, namely Flash memories, hold their information without one. Most devices like smartphones and notebooks currently use a combination of dynamic random-access memory (DRAM) and flash memory, with the former acting as active memory while devices are on, and the latter being used to store data long-term (off or on).
Flash memory is widely used in consumer electronic products such as cell phones and music players. NAND Flash-based solid-state disks (SSDs) are increasingly displacing hard disk drives as the primary storage device in laptops, desktops, and even data centers. However, Flash is slow and has low endurance. The integration limit of Flash memories is approaching; NAND cannot scale down past 10nm while DRAM and SRAM are costly.
New nonvolatile memory technologies are emerging such as magnetic random-access memory (MRAM), spin-transfer torque random-access memory (STT-RAM), ferroelectric random-access memory (FeRAM), phase-change memory (PCM), and resistive random-access memory (RRAM), that combine the speed of static random-access memory (SRAM), the density of dynamic random-access memory (DRAM), and the nonvolatility of Flash memory and becoming very attractive for future memory hierarchies.
Western Digital, owner of the SanDisk brand, has unveiled what it calls the “world’s first” 1TB SD card. It’s only a prototype, but already the company is touting the card’s ability to adequately handle 4K, 8K, VR and 360-degree video when it officially becomes available
Intel and Micron’s Breakthrough Memory Technology coming in 2017
Intel’s just released a new SSD into the market featuring 64-layer, vertically-stacked, 3D NAND storage. The new 545s SATA-SSD uses 16nm Hynix TLC NAND and a Silicon Motion SM2258 controller. At the moment it’s only available in a 512GB format, but more drives ranging from 128GB up to 2TB are expected to follow, as well as a version in the M.2 form factor. The 545s SATA-SSD is capable of sequential read speeds of up to 550MB/s, and sequential writes speeds of 500MB/s in bursts, and 475MB/s in sustained operations.
Intel’s latest SSD may be making use of 64-layer 3D NAND, now Western Digital has announced its new 96-layer 3D NAND storage technology. The new chip, named BiCS4, will start out in 256GB capacities, but it’s expected that 1TB chips will follow. “BiCS4 will be available in 3-bits-per-cell and 4-bits-per-cell architectures, and it contains technology and manufacturing innovations to provide the highest 3D NAND storage capacity, performance and reliability at an attractive cost for our customers,” said Dr. Siva Sivaram, Executive Vice President of Memory Technology at Western Digital, in today’s release. “Western Digital’s 3D NAND portfolio is designed to address the full range of end markets spanning consumer, mobile, computing and data centre.”
Intel’s superfast Optane drives coming to Apple MacBooks in Q12017, according to reports. Optane is the name accorded for a type of memory and SSD based on 3D XPoint. Intel Corporation and Micron Technology, Inc. have developed 3D XPoint™ technology, a non-volatile memory technology that is up to 1,000 times faster and has up to 1,000 times greater endurance than NAND, and is 10 times denser than conventional memory. It combines the best of DRAM and NAND at the silicon level.
The innovative, transistor-less cross point architecture creates a three-dimensional checkerboard where memory cells sit at the intersection of word lines and bit lines, allowing the cells to be addressed individually. As a result, data can be written and read in small sizes, leading to faster and more efficient read/write processes.
3D XPoint is a “Fundamentally Different Technology” than current memory types. It’s an ReRAM that uses material property changes for bit storage where both DRAM and NAND use charge to store a bit. The chip currently stores 128Gb in two stacked planes of 64Gb each, storing a single bit per cell.
The companies said that 3D Xpoint is targeted at data centers, and described how applications and services would benefit immensely from “fast access to large sets of data.”
IBM scientists create an atom-sized magnet that could be the future of data storage
Researchers at IBM led by Andreas Heinrich, Director of the Center for Quantum Nanoscience, have discovered a way to store one bit of data on a single atom using magnets. Currently, hard drives store one bit of data using around 10,000 atoms. Disks coated with a magnetized layer of metal allow our computers to store files in the form of bits, each with the value of either 1 or 0. A certain direction of magnetization corresponds to the 0 bit, the other direction to the 1 bit. This result is a breakthrough in the miniaturization of storage media and has the potential to serve as a basis for quantum computing. newly appointed within the Institute of Basic Science (IBS, South Korea), led the research effort that made this discovery at IBM Almaden Research Center (USA).
In this study, scientists worked with a tool, called Scanning Tunneling Microscope (STM), which has a special tip that enables the user to view and move individual atoms, as well as to apply a pulse of electrical current to them. They used this electric pulse to change the direction of magnetization of individual holmium atoms.
A quantum sensor, designed by Heinrich’s team and currently unique worldwide, was used to read the memory stored in the holmium atom. It consists of an iron atom placed next to the holmium atom. Using this technique, as well as another one, called tunnel magnetoresistance, the researchers could observe that holmium maintains the same magnetic state stably over several hours
Moore’s Law predicted that the amount of data that can be stored on a microchip would double every 18 months and indeed this happened for decades. The last model electronic devices are always smaller and more powerful than the previous one. However, as devices becomes smaller and smaller, since atoms are so close to each other, new interfering quantum properties begin to manifest and cause problems. The impossibility of keeping up with further miniaturization, brought experts to talk about the death of Moore’s Law.
Interestingly, holmium atoms seem to escape this fate, for still unknown reasons. “There are no quantum mechanical effects between atoms of holmium. Now we want to know why,” points out Heinrich. Holmium atoms can be arranged very closely together, so the storage density using this single-atom technique could be very high. He continues: “We have opened up new possibilities for quantum nanoscience by controlling individual atoms precisely as we want. This research may spur innovation in commercial storage media that will expand the possibilities of miniaturizing data storage.”
GSI Technology Announces Highest Density RadHard SigmaQuad-II+(TM) SRAM
“We are very excited to introduce our extremely high performance 288Mb SigmaQuad-II+ radiation-hardened SRAM product,” said Paul Armijo, Aerospace & Defense Business Director of GSI Technology. “The SigmaQuad™ SRAM product is expected to serve as a critical element for advanced systems that leverage leading-edge FPGAs, ADCs and DACs; but until now lacked the high density, high performance and power efficiency that our 288Mb memory brings.”
“Our satellite and defense customers have been anxiously awaiting an alternative to current RadHard memory solutions,” continued Armijo. “The RadHard SigmaQuad™ SRAM leverages our proven commercial technology and architecture with radiation-hardening, creating an efficient, high performance, leading-edge memory at the 40nm technology node.”
Computing at the speed of light
Natia Frank, materials chemist at the Canadian University of Victoria (UVic), said the material, known as LI-RAM (light-induced random-access memory), would use light to store and process data. Not electricity. This means computer processors would consume minimal power, discharge minimal heat and last longer. Currently, information processing technologies use up about 10% of the world’s electricity resource, according to UVic, which expects LI-RAM to cut this consumption by half.
Frank says the material in LI-RAM has the unusual quality of rapidly changing magnetic properties when hit with green light. According to a media release issued by UVic, “This means that information can be processed and stored at the single molecule level, allowing for the development of universal memory — a technology that has, until now, been hypothetical.”
Besides its use for data storage in mobile phones, computers and other electronic durables, LI-RAM could come in handy “in medical imaging, solar cells, and a range of nanotechnologies”.
PCM (Phase Change Materials) Memory
Scientists at IBM Research have demonstrated a new level of efficiency for data storage with optical memory, using a storage format called phase-change memory (PCM) to store 3 bits of data per cell for the first time. “Phase-change memory is the first instantiation of a universal memory with properties of both DRAM and flash, thus answering one of the grand challenges of our industry,” said lead researcher Haris Pozidis from IBM Research in Zurich, Switzerland.
“Reaching 3 bits per cell is a significant milestone because at this density the cost of PCM will be significantly less than DRAM and closer to flash. PCM is upto 70 times faster than flash however they are about five to 10 times slower than DRAM. As IBM points out, another advantage of PCM is that the memory can survive at least 10 million write cycles, meaning hypothetically you could be getting a life-time warranty with the storage. Flash memory, on the other hand, only lasts around 3,000 write cycles before degrading.
PCM is nonvolatile random – access memory that stores information in the structural phase of the active materials. They are based on reversible phase conversion between the amorphous and the crystalline state of a chalcogenide glass, which is accomplished by heating and cooling of the glass.
It utilizes the unique behavior of chalcogenide (a material that has been used to manufacture CDs), whereby the heat produced by the passage of an electric current switches this material between two states. The different states have different electrical resistance which can be used to store data.
Robert E. Simpson, and his colleagues have engineered strain into the layered material to tune its switching properties. A strained layered phase-change memory material switches phases five times faster, using about half the voltage, than traditional phase-change memory materials.
Kilopass Announces Breakthrough Memory Technology for IoT Devices
Kilopass Technology, Inc., has unveiled its new semiconductor embedded non-volatile memory (eNVM) , the X2Bit™ bitcell, delivering 10X power reduction compared to currently available eNVM technologies.
The X2Bit bitcell is ideally suited for next-generation IoT devices that demand less than 10uA/MHz in read currents. Currently available eNVM technologies typically consume 100uA/MHz under comparable operating conditions. Kilopass products employing the X2Bit bitcell would operate with core voltage supplies as low as 0.75V that are used in the emerging Ultra-Low-Power (ULP) process technologies from semiconductor manufacturers.
The X2Bit bitcell lowers the turn-on voltage by optimizing the programming condition. This patent-pending implementation results in a more ohmic programming of the N-MOS transistor with controlled locality toward the source, drain region rather than in the middle of the channel.
Benefits are twofold. First, since power consumption is directly proportional to the square of operating voltage, lowering the read voltage by two-thirds would result in tenfold power reduction. Equally important, with lower turn-on voltage, the memory macro would be able to operate at the same operating voltage as the rest of the chip, without resorting to power consuming charge pumps and voltage regulators.
MRAM is a nonvolatile memory, unlike DRAM, the data is not stored in an electric charge flow, but by magnetic storage elements. The storage elements are formed by two ferromagnetic plates, each of which can hold a magnetic field, separated by a thin insulating layer. One of the two plates is a permanent magnet set to a particular polarity; the other’s field can be changed to match that of an external field to store memory.
MRAM-based radiation hardened non-volatile memory products for space introduced by Cobham
Cobham Semiconductor Solutions in Colorado Springs, Colo., is announcing QML V radiation hardened certification of their non-volatile semiconductor memory products. QML V involves especially rugged microelectronics devices that are qualified for space applications.
The MRAM-based product offering includes a 64-megabit device, UT8MR8M8, offered in a 40-lead quad flatpack, and a 16-megabit device, UT8MR2M8, available in a 40-lead flatpack.
Spin Transfer Torque Random Access Memory (STT-MRAM or STT-RAM) stores information in the magnetic state of Nano magnets, but it is electrically written and read. This combination allows fast-access, non-volatile information storage but with better scalability over traditional MRAM.
It relies on the different spin directions of electrons to signal a binary one or zero. The STT is an effect in which the orientation of a magnetic layer in a magnetic tunnel junction or spin valve can be modified using a spin-polarized current.
Spin-transfer torque technology has the low power and low cost of flash memory, scales well below 10nm, and leverages existing CMOS manufacturing techniques and processes. It has the potential to make MRAM devices combining low current requirements and reduced cost possible; however, the amount of current needed to reorient the magnetization is at present too high for most commercial applications.
‘Bending Current’ Opens Up the Way for a New Type of Magnetic Memory
In a MRAM bits are projected by the direction of the spin of the electrons in a piece of magnetic material: for example, upwards for a ‘1’ and downwards for a ‘0’. The storage of data occurs by flipping the spin of the electrons over to the correct side.
Magnetic random-access memory (MRAM) is more efficient and robust than other kinds of data storage, but switching bits still requires too much electrical power to make large-scale application practical. Eindhoven University of Technology (TU/e) researchers say they have solved this problem by using a “bending current,” an approach that flips the magnetic bits faster and more efficiently than with conventional methods.
The new method involves sending a current pulse under the bit, which bends the electrons at the correct spin upwards, and so through the bit. “It’s a bit like a soccer ball that is kicked with a curve when the right effect is applied,” says TU/e researcher Arno van den Brink.
Although the technique is exceptionally fast, it needs something to make the flipping reliable. Early attempts to do this required a magnetic field, but that made the method expensive and inefficient. The TU/e researchers say they solved this problem by applying a special anti-ferromagnetic material on top of the bits, enabling the requisite magnetic field to be frozen, achieving energy efficiency and low cost.
“This could be the decisive nudge in the right direction for superfast MRAM in the near future,” van den Brink says.
Avalanche’s STT-RAM chip
Startup Avalanche is sampling an STT-RAM chip offering DRAM/SRAM speed, persistent storage, unlimited endurance and scalability beyond 10nm. The Avalanche chip uses proprietary AvRAM technology featuring perpendicular magnetic tunnel junction (pMTJ) cells manufactured on a standard CMOS 300mm process, which it claims is high volume and low cost.
Avalanche says its pMTJ cells have a magnetic “pinned” layer, an MgO barrier layer for high and low-resistance generation, and another magnetic “storage” layer. The magnetic orientation of the pinned layer is permanently fixed during operation, while that of the storage layer is not.
Magnetisation of the storage layer changes its perpendicular direction based on the direction of the electrical current being applied and flowing through the pMTJ cell. It claims pMTJ requires less real estate than other STT-MRAM implementations, compared with current generation in-plane MTJ cell designs.
Multiferroic Memory Promises Low-Power, Instant-on Computing
A team at Cornell University led by postdoctoral associate John Heron has made a breakthrough for next-generation nonvolatile memory by successfully using an electric field to reverse the magnetization direction in a multiferroic spintronic device at room temperature.
“Encoding of data in memory using only electric field instead of electric currents used by today’s computer memory technology resulting in large reduction of power consumption and heat generation , enhanced memory density and make low-power, instant-on computing a reality,” say researchers.
Multiferroics are materials in which unique combinations of electric and magnetic properties can simultaneously coexist. The researchers used bismuth ferrite a type of “multiferroic” material, that is both magnetic as it has its own, permanent local magnetic field, and also ferroelectric, meaning it’s always electrically polarized, and that polarization can be switched by applying an electric field.
To demonstrate the potential technological applicability of their technique, Ramesh, Heron and their co-authors used heterostructures of bismuth ferrite and cobalt iron to fabricate a spin-valve, a spintronic device consisting of a non-magnetic material sandwiched between two ferromagnets whose electrical resistance can be readily changed
The multiferroic device require an order of magnitude lower energy than its chief competitor, spin-transfer torque magnetoresistive RAM (STTMRAM), however, STT memory is already available commercially, albeit in limited scope. Nonetheless, getting multiferroics to operate at room temperature is a major development.
RRAM is a nonvolatile memory that is similar to PCM. The technology concept is that a dielectric, which is normally insulating, can be made to conduct through a filament or conduction path formed after application of a sufficiently high voltage. This memristor technology is considered as potentially a strong candidate to challenge NAND Flash. At 16 Gb the Micron-Sony RRAM has the highest density commercialized among emerging NVM technologies.
Silicon Valley start-up Crossbar expects some of its 3D Restive RAM (3D RRAM) products to be out in 2016 as memory in wearable devices, with high-density storage devices like solid-state drives arriving within 18 months after that.
Because of its greater density, RRAM will be able to use silicon wafers that are half the size used by current NAND flash fabricators. In a single chip, it has nearly 10 times the capacity of NAND flash and uses 20 times less power to store a bit of data. It also sports 100 times lower latency than NAND flash, meaning performance is massively improved, according to Crossbar.
Rice University RRAM technology
A research team from Rice University has produced a nonvolatile, resistive random access memory (RRAM) technology that provides high-density storage in crossbar memory arrays. Developed in the laboratory of Professor James Tour, the solid-state memory is based on tantalum oxide and has silicon oxide as the dielectric component.
The cells are built with layers of graphene, tantalum, and nanoporous tantalum oxide, all of which are pressed in between two platinum electrode crossbars. The research team found that applying a control voltage to the 250-nanometer-think stack creates addressable bits where the layers meet.
Each 3D memory cell supports up to 162 gigabits or 20 gigabytes of information, using highly resistive materials to increase the density of the memory between each crossbar. This would enable future smart phones to store upto terabyte of memory compared to 64 GB at present, allowing us to store vast amounts of data — videos, movies, games — on our phones.
“Our technology is the only one that satisfies every market requirement, both from a production and a performance standpoint, for nonvolatile memory,” Tour said. “It can be manufactured at room temperature, has an extremely low forming voltage, high on-off ratio, low power consumption, nine-bit capacity per cell, exceptional switching speeds and excellent cycling endurance.”
Imec and Panasonic Corp. have fabricated a 40nm TaOx-based RRAM (resistive RAM) technology with precise filament positioning and high thermal stability. This breakthrough result paves the way to realizing 28nm embedded applications.
Nantero’s carbon nanotube memory breakthrough
Nantero has announced NRAM, a CNT-based memory, faster and more durable than flash, as fast and lower power than DRAM, and fabricated on standard DRAM lines. In addition, NRAM is compatible with existing CMOS fabs without needing any new tools or processes, and it is scalable even to below 5nm.
CNTs conduct electricity as well as copper, while being stronger than steel and as hard as diamond. Nantero’s process lays down a non-woven fabric of CNTs between two electrodes. NRAM works like a light switch: a greater-than-read voltage is applied, causing the CNTs to physically move, creating or breaking connections and flipping “0” to a “1” or vice versa. Once flipped the CNT fabric is very stable The CNT’s physical strength protects them from damage.
NRAM is as fast as and denser than DRAM, nonvolatile like flash, has essentially zero power consumption in standby mode and 160x lower write energy per bit than flash,
Its advantages are unlimited endurance, more than 1000 years Non-volatility at 85C, picosecond switching, and is highly resistant to environmental forces (heat even up to 300 degrees C, cold, magnetism, radiation, vibration). Nantero believes that 1Tb chips are possible with multiple layers of CNT NRAM.
This makes NRAM the ideal solution for the next generation of memory technology for both standalone and embedded applications
Magnonic Holographic Memory
Researchers at the University of California, Riverside Bourns College of Engineering and the Russian Academy of Sciences have demonstrated a new type of pattern recognition using a “magnonic” holographic memory device, intended to improve hardware for speech and image recognition.
The device is based on patterns of sound and images that are encoded into the phase (timing) of spin waves, which are collective oscillations of spins in magnetic materials. Spin wave devices have a shorter wavelength than light, so they are more scalable. Spin-wave devices are also compatible with conventional electronic devices and can be integrated into a chip
The prototype eight-terminal device consists of a magnetic matrix with micro-antennas placed on the periphery of the matrix to excite and detect spin waves. The principle of operation is based on the effect of spin wave interference, which is similar to the operation of optical holographic devices.
Input information is encoded in the phases of the spin waves generated on the edges of the magnonic matrix, while the output corresponds to the amplitude of the inductive voltage produced by the interfering spin waves on the other side of the matrix. The level of the output voltage depends on the combination of the input phases as well as on the internal structure of the magnonic matrix.
The work builds upon findings published last year by the researchers, who showed a 2-bit magnonic holographic memory device can recognize internal magnetic memory states via spin wave superposition. That work was recognized as a top 10 physics breakthrough by Physics World magazine.
Holography is a technique based on the wave nature of light which allows the use of wave interference between the object beam and the coherent background. Holography has been also recognized as a future data storing technology with unprecedented data storage capacity and ability to write and read a large number of data in a highly parallel manner.
The main challenge associated with magnonic holographic memory is the scaling of the operational wavelength, which requires the development of sub-micrometer scale elements for spin wave generation and detection.
Currently, FRAM, MRAM, and PCM are in commercial production but still, relative to DRAM and NAND Flash, remain limited to niche applications. The race for a workable NVRAM is in its final stages. HP’s memristor, Crossbar’s RRAM and now, Nantero’s NRAM, are all technically sounded, backed by tens of millions of dollars in R&D, and close to broad market release.
Any new technology must be able to deliver most, if not all, of the following attributes in order to drive industry adoption on a mass scale: scalability of the technology, speed of the device, and power consumption to be better than existing memories. Reliability, and the raw cost of memory are also another criteria in determining the economic success or failure of each system product brought to market.
According to the new market research report “Non-Volatile Memory Market by Type (Flash, NVSRAM, 3D NAND, 3D Xpoint, NRAM, FRAM, MRAM, NVDIMM), Application (Consumer Electronics, Energy & Power, Healthcare, Automotive, Enterprise Storage), and Geography – Global Forecast to 2022”, the non-volatile memory market is expected to be worth USD 80.54 Billion by 2022, growing at an estimated CAGR of 9.93% between 2016 and 2022. The market for 3D NAND would grow at the highest CAGR between 2016 and 2022
The market for 3D NAND memory-based products is expected to grow at the highest rate as 3D NAND mainly solves the scaling limitation problem in NAND and is expected to be used widely in consumer electronics products, such as smart phone, tablet, PCs, laptops and digital cameras and replace NAND memory completely in coming years.