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More than Moore ( MtM) technologies required for Internet of Things and Next Generation Defense Systems

Moore’s Law which stated that the number of transistors on a chip will double approximately every two years has been the driver of semiconductor industry in boosting the complexity, computational performance and energy efficiency while reducing cost. It has led to substantial improvements in economic productivity and overall quality of life through proliferation of computers, communication, and other industrial and consumer electronics. Microelectronics and solid state components have also been the backbone of the military systems and were main contributors in advancement of radar, communication and electronic warfare systems.

Moore’s Law is becoming more and more difficult. As dimensions approach nanometer ranges, CMOS transistors are difficult to operate because of rising power dissipation of chips and the fall in power gain of smaller transistors, soaring fabrication plant costs and finally quantum effects in silicon will bring about an end to the ongoing miniaturization of CMOS transistors.

The vision of “More Moore” Technologies is to continue to follow the exponential reduction in size of electronic devices by migrating from charge to non-charge based devices i.e. based on spin, molecular state, photons, phonons, nanostructures, mechanical state, resistance, quantum state (including phase) and magnetic flux.

‘More than Moore‘ (MtM) refers to a set of technologies that enable non digital micro / nanoelectronic functions. They are based on, or derived from, silicon technology but do not necessarily scale with Moore’s Law.

MtM devices typically provide conversion of non-digital as well as non-electronic information, such as mechanical, thermal, acoustic, chemical, optical and biomedical functions, to digital data and visa versa. MtM technologies  include Radio frequency (RF), High-voltage and power, Solid-state lighting (SSL), Medical Ultrasound, Biochips and microfluidics, Energy scavenging, Electronic imaging, Sensors and actuators on CMOS platforms

The Internet of Things represents a vast opportunity and “More than Moore” technologies are at the heart of it – making it possible to connect any device and use big data analytics to change the world. The IoT presents  nearly limitless opportunities  for MtM with the need to integrate flash, CIS, RF, high voltage, power and MOSFET technologies

“More than Moore”

The “More than Moore” or MTM domain encompasses the engineering of complex systems through heterogeneous integration (in SOC or SIP) of various technologies. The “More-than-Moore” approach allows for the non-digital functionalities to migrate from the system board-level into the package (SIP) or onto the chip (SOC). These More than Moore technologies shall support development of wearable and implantable systems, ultra-low power sensor nodes, reprogrammable, multifunction digital RF components and intelligent Microsystems.The More-than-Moore sector is predicted to show a long-term compound annual growth rate of 15 percent, with a total market in 2015 already expected to reach $60 billion.

SiGe (or “Siggie” as it’s often called) involves a revolutionary process in which the electrical properties of silicon are augmented with germanium to improve operating frequency, noise, and power capabilities. it has been widely adopted like in high-speed, low-cost wireless applications, high-speed test and measurement equipment and optical modulators.

 

Radiation Hardened Electronics

Radiation Hardened Electronics Market is projected to reach $1450 Million by 2020, , according to a new Report by Markets and Markets. The high-altitude flights and space operations are more exposed to ionizing radiation, which causes damage to the semiconductor electronics systems. Today the threat of an orbital nuclear explosion, and advancement of electromagnetic pulse (EMP) weapons, is also driving the need of radiation hardened electronics. The devices to be protected now include those carried into the field by individual warfighters-such as smartphones and tablets-to vehicles (military, commercial, and civil), bank ATMs, the Internet, personal and business computers, and hospital equipment.

The protecion of systems from radiation falls into two categories: radiation-tolerant R-T-or fault-tolerant-as “systems, predominantly computing systems, communication systems and other computer-based systems, which tolerate undesired changes in their internal structure, internal state or external environment” . Radiation-hardened, Rad-hard, on the other hand, means, electronic components or systems have been made resistant to damage or malfunction caused by ionizing radiation (particle radiation and high-energy EM radiation) from natural phenomenon in space or at high altitude, in the proximity of nuclear reactors or particle accelerators, during nuclear accidents or nuclear warfare or from man-made EMP weapons.

Nanodiamond and Diamond based devices are expected to be utilized for development of high power and high frequency devices especially for harsh space environments and in nuclear reactors due to exceptional mechanical and electronic properties of diamond.

Integrated photonic circuits

Electronic circuits alone cannot fully meet future requirements for speed, size, and weight of many sensor systems, as a result, interest in integrated photonic circuits (IPCs) and the hybridization of electronics with photonics is growing. Germanium on silicon processes are being developed has many advantages to enable higher performance designs that can be better incorporated into an IPC. For example,

Ge photodetectors offer an enormous responsivity to laser wavelengths near 1.55μm at high frequencies to 40GHz, and they can be easily fabricated as part of a planar silicon processing schedule. At the same time, germanium has enormous potential for enabling 1.55 micron lasers on silicon and for enhancing the performance of silicon modulators.

Silicon Photonics

The advancement in Silicon Photonics is leading to much smaller and much cheaper photonic devices and also will make accessible a large range of applications from fiber optics based communication systems to intra-chip communication or as optical interconnects. Fabrication of Silicon photonic devices in CMOS compatible silicon-on-insulator is resulting in integration of optical and electronic circuitry.

The combination of top-down and bottom-up self-assembly on hybrid platforms will be a natural evolution and will offer cost-effective ways to achieved performance and increased functionality in SOC or SIP. Integrated Bio, Nano, photonics, Quantum devices SOC are expected to be available. Some other exciting developments could be radiation resistant electronics. Self-healing circuits and devices are expected to be developed leading to robust military equipment resilient to manufacturing flaws, high temperatures or the deterioration that comes with aging.

Defence Electronics
Europe

The European Defense Agency considers Nanoelectronics as the backbone of many advanced technologies and military requires cutting edge performance, reliability and robustness in specific operational environments, multi-functionality, high integration density and low weight from it. For next generation Monolithic Microwave Integrated Circuits (MMIC) based on the widebandgap semiconductor Gallium Nitride and the related technologies, EDA projects supported the creation of a comprehensive European supply chain which will be critical for the development and production of the next generation radar, communication and electronic protection defence systems. Some of additional areas identified are Nano-Electro-Mechanical Systems (NEMS), System-on-Chip, Photonics, Advanced Multifunctional and Conformal Antennas.

DOD

DOD requirements of next generation microelectronics are significant reductions in size, weight, power and cost, higher levels of reconfigurability and tunability, thermal management and use in harsh environments, trustworthiness and tamper-proof.

 

Lockheed Martin

“Lockheed Martin is committed to significantly reducing the size, weight, power and cost (SWAP-C) of systems by applying next-generation technology in areas that include microelectronics, photonics and system-in-package technologies,” said Steve Betza, Lockheed Martin director of Advanced Manufacturing”. Wide bandgap (WBG) semiconductors will allow for power electronic devices to be smaller, faster and more efficient than their current silicon-based counterparts with applications in high-frequency and high-power radar, satellite communications, and high-density power applications.

It is also focusing on secure electronics, next-generation carbon nanotube-based memory and logic technology. Nanotube-based/nonvolatile random access memory (NRAM®) chips that can cut power use by 50 percent compared to competitive memory.

Lockheed Martin is also focusing on the maturation of mixed-signal microelectronics. Using mixed-signal integrated circuit technology, engineers can replace entire circuit cards using small radio frequency integrated circuit (RFIC) microchips. This breakthrough technology can drastically reduce the size of electronics and is already being used on radar systems and satellite payloads. It is also working on advanced, carbon-based materials that would be able to overcome challenges of deep space like stress,vibrations and space environment

 

ITRS 2.0: Toward a re-framing of the Semiconductor Technology Roadmap

The International Technology Roadmap for Semiconductors (ITRS) has road mapped technology requirements of the semiconductor industry over the past two decades. Traditionally, the ITRS identifies major semiconductor IC products as drivers; these set requirements for the state-of-the-art semiconductor technologies. High-performance microprocessor unit (MPU-HP) for servers and consumer portable system-on-chip (SOC-CP) for smartphones are two examples.

However, as new requirements from applications such as data center, mobility, and context-aware computing emerge, the existing roadmapping methodology is unable to capture the entire evolution of the current semiconductor industry.

The ITRS roadmapping committee has already been reorganized to focus on ITRS 2.0. There are now seven groups focused on what ITRS chairman Paolo Gargini calls the seven “building blocks.”
• System Integration—studies and recommends system architectures to meet the needs of the industry. It prescribes ways of assembling heterogeneous building blocks into coherent systems.
• Outside System Connectivity—refers to physical and wireless technologies that connect different parts of systems.
• Heterogeneous Integration—refers to the integration of separately manufactured technologies that in the aggregate provide enhanced functionality.
• Heterogeneous Components —describes devices that do not necessarily scale according to “Moore’s Law,” and provide additional functionalities, such as power generation and management, or sensing and actuating.
• Beyond CMOS—describes devices, focused on new physical states, which provide functional scaling substantially beyond CMOS, such as spin-based devices, ferromagnetic logic, and atomic switch.
• More Moore—refers to the continued shrinking of horizontal and vertical physical feature sizes to reduce cost and improve performance.
• Factory Integration consists of tools and processes necessary to produce items at affordable cost in high volume.

 

 

IEEE’s Heterogeneous Integration Roadmap

Heterogeneous Integration Roadmap activities  are sponsored by IEEE Components, Packaging and Manufacturing Technology Society (CPMT), SEMI  and the IEEE Electron Devices Society (EDS), with the intention of expanding the roadmap collaboration to other IEEE Technical Societies that share interest in the Heterogeneous Technology Roadmap as well as to organizations outside IEEE that share this common vision for the roadmap.

Heterogeneous Integration refers to the integration of separately manufactured components into a higher level assembly (SiP) that, in the aggregate, provides enhanced functionality and improved operating characteristics. Components could mean any unit whether individual dies, MEMS device, passive component and assembled package or sub-system that are integrated into a single package. The operating characteristics should also be taken in its broadest meaning including characteristics such as system level performance and cost of ownership.

The IEEE CPMT Heterogeneous Integration Roadmap will address the assembly & packaging, test and interconnect technologies required to meet industry needs over the next 15 years. The scope statement refers specifically to the 2016 edition of this Roadmap. It will be revised for each addition to define the changing scope of the Roadmap over time.

 

“Packaging is the final manufacturing process transforming devices into functional products for the end user. Packaging must provide electrical and photonic connections for signal input and output, power input, and voltage control. It also provides for thermal dissipation and the physical protection required for reliability. The rise of  the Internet of Things (IoT), movement to the cloud of data  logic and applications, the slowing of Moore’s Law scaling for CMOS and the realization that transistors at the geometries to be used will wear out all place new demands on the industry.”

 

“Design concepts, packaging architectures, device types, materials, manufacturing processes and systems integration technologies are all changing rapidly. These innovations have resulted in development of several new technologies as well as expansion and acceleration of technologies introduced in prior years. Heterogeneous integration with wireless and mixed signal devices, bio-chips, power devices, optoelectronics, and MEMS in a single package is placing new requirements on the industry as these diverse components are introduced as elements for System-in-Package (SiP) architectures.”

 

“The scope or the Heterogeneous Integration Roadmap is identification of the difficult challenges and the potential solutions for meeting technical requirements for the next 15 years and 25 years for emerging research areas. The primary integration technology for the potential solutions will be complex, 3D System in Package (SiP) architectures.”

 

The mission of this Heterogeneous Integration Roadmap is to provide guidance to the profession, industry, academia and government to identify key technical challenges with sufficient lead time that they do not become roadblocks preventing the continued progress in electronics. That progress is essential to the future growth of the industry and the realization of the promise of continued positive impact on mankind. The approach is to identify the requirements for heterogeneous integration in the electronics industry through 2031, determine the difficult challenges that must be overcome to meet these requirements and, where possible, identify potential solutions.

DARPA’s Semiconductor Technology Advanced Research Network (STARnet)

Semiconductor Research Corporation (SRC) and the Defense Advanced Research Projects Agency (DARPA) has launched a $194 million initiative, the Semiconductor Technology Advanced Research Network (STARnet) to help maintain U.S. leadership in semiconductor technology that is vital to U.S. prosperity, security and intelligence. The six academic teams are grouped into the following centers:

Function Accelerated Nanomaterial Engineering (FAME): The FAME Center hosted at the University of California-Los Angeles, focuses on nonconventional materials and devices incorporating nanostructures with quantum-level properties to enable analog, logic and memory devices for beyond-binary computation.

Center for Spintronic Materials, Interfaces, and Novel Architectures (C_SPIN): C_SPIN hosted at the University of Minnesota focuses on magnetic materials, spin transport, novel spin-transport materials, spintronic devices, circuits and novel architectures and create the fundamental building blocks that allow revolutionary spin-based multi-functional, scalable memory devices and computational architectures to be realized.

Systems on Nanoscale Information fabriCs (SONIC): SONIC is hosted at the University of Illinois-Urbana Champaign. It shall explore a drastic shift in the model of computation and communication from a deterministic digital foundation to a statistical one for applications such as imaging processing and communications.

Center for Low Energy Systems Technology (LEAST): LEAST is hosted at Notre Dame University with the overriding goal of low power electronics. For this purpose it addresses nonconventional materials and quantum-engineered devices, and projects implementation in novel integrated circuits and computing architectures.

The Center for Future Architectures Research (C-FAR) The scope of C-FAR based at the University of Michigan is to Research future scalable computer systems architectures that maximally leverage emerging circuit fabrics to enable whole new commercial/defense application areas through a highly collaborative research agenda.

The TerraSwarm Research Center (TerraSwarm): Terraswarm is hosted at the University of California-Berkeley. It shall Enable the simple, reliable and secure deployment of a multiplicity of advanced distributed sense-control-actuate applications on shared, massively distributed, heterogeneous and mostly uncoordinated swarm platforms through an open and universal systems.

“Without the nanoelectronics sector there would be no viable defence sector, and without defence, investment in nanoelectronics would not be feasible”,said Michael Sieber, EDA assistg one roundtable.

 

References and resources also include:

http://wallstreetpit.com/113576-breakthrough-chip-technology-worlds-smallest-chip-created/

http://cpmt.ieee.org/technology/heterogeneous-integration-roadmap.html

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