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DARPA pursues game-changing technologies and capabilities in a way that provides a surprising advantage for U.S. and Allied warfighters and at a much faster pace than the state of the art. DARPA’s work with the Services and other agencies aims to meet not just known but as-yet unrecognized needs and move swiftly to deployment. That includes an increased emphasis on prototyping and joint projects – and, especially, a tighter emphasis on designing, building, and testing aspects of technology. DARPA also seeks to promote continued American innovation throughout the broader S&T ecosystem of university and industry partners.
Joint University Microelectronics Program (JUMP) is one of the DARPA’s formal program aimed at supporting the next generation of researchers. Under JUMP, the challenges of the “application-centric” research centers focus on accomplishing application-oriented goals and spurring the development of complex systems with capabilities well beyond those available today. Diving deep into cognitive computing, intelligent memory and storage, distributed computing and networking, and radio frequency (RF) to terahertz (THz) sensor and communications systems, among other areas, these research centers are developing systems that will be transferable to military and industry in a five year timeframe and ready for field deployment in ten years.
The Joint University Microelectronics Program (“JUMP”), is a collaborative effort between the Department of Defense, U.S. universities and the industrial participants with a goal to substantially increase the performance, efficiency, and capabilities of broad classes of electronics systems for both commercial and military applications. The collaborative, multidisciplinary, multi-university consortium will support long-term research focused on high-performance, energy-efficient microelectronics for end-to-end sensing and actuation, signal and information processing, communication, computing, and storage solutions that are cost-effective and secure.
Research commenced in January 2018 and will continue for five years, with funding support coming from industry and government partners. Total JUMP funding for the five-year period will be in excess of $150M, including funds committed by DARPA (Defense Advanced Research Projects Agency, www.darpa.mil).
JUMP is a major public/private initiative that includes several leading companies from the semiconductor and defense industries such as Intel, Analog Devices, IBM Corporation, Northrop Grumman Corporation, Micron Technology, Inc., Intel Corporation, EMD Performance Materials (a Merck KGaA affiliate), Analog Devices Inc., Raytheon Company, Taiwan Semiconductor Manufacturing Company Ltd., Lockheed Martin Corporation, ARM Limited, Samsung Electronics Co., Ltd., and SK hynix Inc. They have tasked six research centers to undertake high-risk, high-payoff research that addresses existing and emerging challenges in microelectronic technologies. JUMP comes at an inflection point in the history of the semiconductor industry where application and system research are critical to enabling the development of superior electronic systems to meet DoD and commercial needs.
Under JUMP, the challenges of the “application-centric” research centers focus on accomplishing application-oriented goals and spurring the development of complex systems with capabilities well beyond those available today. Diving deep into cognitive computing, intelligent memory and storage, distributed computing and networking, and radio frequency (RF) to terahertz (THz) sensor and communications
systems, among other areas, these research centers are developing systems that will be transferable to military and industry in a five year timeframe and ready for field deployment in ten years.
These research and development efforts should provide the Department of Defense with an unmatched technological edge in advanced radar, communications, and weapons systems, and provide the U.S. economy with unique information technology and processing capabilities critical to commercial competitiveness and future economic growth.
The Consortium seeks to address existing and emerging challenges in electronics and systems technologies by concentrating resources on high-risk, high-payoff, long-range innovative research to accelerate the productivity growth and performance enhancement of electronic technologies and circuits, sub-systems, and multi-scale systems. To this end, JUMP is focused on exploratory research on an 8-12 year time horizon that is anticipated to lead to defense and commercial opportunities in the 2025-2030 timeframe.
Current planning supports six research themes across six JUMP centers and utilizes vertical and horizontal centers to capture the intersections of ideas. The focus research area of the individual centers and the overall organization is shown in the JUMP Research Structure graphic.
The consortium, for which SRC serves as the administrative hub, conducted a search for university research proposals throughout 2017 with the goal of uncovering innovative approaches to solving tough development challenges around microelectronics. Four of the successful proposals to participate in the JUMP program fall under the category “vertical” application-focused centers and two fall under the category “horizontal” disciplinary-focused centers.
The point of JUMP and its six thematic centers is to drive a new wave of fundamental research with the potential to deliver the disruptive microelectronics-based technologies required by the Department of Defense and national security in the 2025-2030 timeframe,” said Linton Salmon, DARPA’s program manager for JUMP. “Through these university teams, we’re seeking innovative solutions to tough technical challenges so that we can overcome today’s limitations in the performance and scalability of electronic systems. This in turn will open the way to technologies that dramatically boost the warfighter’s abilities to sense the environment, process information, and communicate.”
Funding for the five-year effort is expected to total approximately $200 million, with DARPA providing about 40 percent of the funding and consortium partners collectively kicking in about 60 percent. otal JUMP funding for the five-year period will be in excess of $150M, including funds committed by DARPA (Defense Advanced Research Projects Agency, www.darpa.mil), IBM Corporation, Northrop Grumman Corporation, Micron Technology, Inc., Intel Corporation, EMD Performance Materials (a Merck KGaA affiliate), Analog Devices Inc., Raytheon Company, Taiwan Semiconductor Manufacturing Company Ltd., and Lockheed Martin Corporation. Research will continue for five years with funding support coming from industry and government partners.
Joint University Microelectronics Program (“JUMP”)
The mission of JUMP is to look beyond today’s technology horizon and lay the scientific groundwork that extends the viability of Moore’s Law economics through 2040. This program must create new general purpose architectures and system designs that relax device constraints and provide opportunities for new device types and novel, heterogeneous integration solutions. It must invent new devices and designs that are capable of the performance achievable today at a power consumption that is 1-3 orders of magnitude lower. Finally, it must train tomorrow’s workforce to deliver “smart, autonomous, safe, connected, efficient, and affordable” electronics that meet our sensing, actuation, communication, computing, and storage needs for 2025 and beyond. In addition to providing enabling technologies, the research scope for each Center represents a critical component in the development of systems for both the semiconductor and defense industries and the Department of Defense.
Innovative ideas and fresh thought will be the catalyst to enable the technology roadmap for 2025 and beyond. There is no requirement to be from a participating SRC research university or to have been a previously sponsored SRC researcher. In fact, a key goal of this research announcement is to merge the ideas from established innovators within the existing university networks of SRC and the defense community with those from new, rising institutions or researchers.
The Joint University Microelectronics Program, or JUMP, supports long-term research focused on high performance, energy efficient microelectronics for end-to-end sensing and actuation, signal and information processing, communication, computing, and storage solutions that are cost-effective and secure. The highly-skilled students working on these research initiatives will ultimately become the workforce of tomorrow that will implement these technologies into commercial solutions.
Current planning supports six research themes across six JUMP centers and utilizes vertical and horizontal centers to capture the intersections of ideas. While the vertical research centers emphasize breakthrough technologies and products, Horizontal research centers will drive foundational developments in a specific discipline, and create disruptive breakthroughs in areas of interest.
The vertical research centers emphasize application-oriented goals that focus on key issues facing the industry by addressing the full span of multi-disciplined science and engineering required to achieve breakthrough technologies and products. Proposers for each vertical center are expected to define a grand challenge in the research space that will be achieved by the center before the end of the JUMP program. Horizontal research centers will drive foundational developments in a specific discipline, or set of like-minded disciplines, will build expertise in and around key disciplinary building blocks, and create disruptive breakthroughs in areas of interest to JUMP members. Proposers from the horizontal centers are expected to define a set of key metrics that their center will use to benchmark and drive efforts in the defined research space.
“Vertical” Application-Focused Centers
Within the JUMP context, the challenges of the “vertical” research centers focus on accomplishing application-oriented goals and spurring the development of complex systems with capabilities well beyond those available today. The focus is on key issues facing the industry by addressing the full span of multi-disciplined science and engineering required to achieve breakthrough technologies and products. Diving deep into cognitive computing, intelligent memory and storage, distributed computing and networking, and RF to THz sensor and communications systems, among other areas, these research centers will strive to develop systems that will be transferable to military and industry in a five year timeframe and fieldable in in ~10 years.
Technology areas of interest for the JUMP “vertical” Centers include:
Center for Converged TeraHertz Communications and Sensing (ComSecTer)
This theme seeks research in two general, synergistic application areas – RF Sensors and RF Communications Systems – that operate at microwave, millimeter wave or THz frequencies in support of consumer, military, industrial, scientific and medical applications. System examples may include radar, communication, reconnaissance and/or mmwave / THz imaging.
As an example, it is envisioned that future RF sensor systems will require novel, energy-efficient devices, circuits, algorithms, and architectures for adaptively sensing the environment, extracting/manipulating/processing information, and autonomously reacting/responding to the information.
Another example is cognitive communication systems – systems which will operate in complicated radio environments with interference, jamming and rapidly changing network topology, will obtain (sense) information about their environment (aware of their environment and the available resources ) and will dynamically adjust their operation (e.g., efficient spectrum use, interference mitigation, spectrum prioritization) to provide required services to end users.
These future systems should also have Agility, reconfigurable, adaptive, multi-function, multi-mode, self-calibrating sensors with increased degrees of freedom for efficient use of EM spectrum (including: spectrum agility, instantaneous bandwidth/ waveform agility, (very) wide bandwidth, high dynamic range). Autonomous operation and decision making is also desirable. (e.g., embedded real-time learning, ability to recognize threat scenarios, ability to do local-processing before transmitting the data/information) Super-linear communication links (enabling high modulation formats) and integrated communications components for IoT and distributed sensor systems that enable ultra-low power, high data rate, long-range sensor communications with high linearity in up/down conversion
To address these applications, centers focusing on this vertically integrated application must drive breakthrough research in materials, devices, components, circuits, integration and packaging, connectivity, architectures (e.g., subsystems/arrays), and algorithms that are aimed at efficiently generating, modulating, manipulating, processing (mainly in or very closely coupled to the RF/mm wave /THz domain), communicating (transmitting) and sensing/detecting radiated signals.
Researchers from 10 universities led by Mark Rodwell of the University of California, Santa Barbara will work within ComSecTer toward the collective goal of developing technologies for a future cellular infrastructure designed to support the autonomous vehicle revolution and the emergence of intelligent highways. The envisioned cellular infrastructure will be capable of handling the data demands require to support technologies like cm-precision localization, unparalleled high-resolution imaging, and lightweight “whisper radio” technology, which researchers would apply to solving some of the communication, safety, and navigation challenges associated with autonomous driving today.
Computing On Network Infrastructure for Pervasive Perception, Cognition, and Action (CONIX)
Importantly, new application requirements coupled with physics-based implementation constraints on latency and energy call for novel architectural solutions to computing-at-scale, requiring innovations in interconnect and networking at all levels, from on-chip to between datacenters. The purpose of this theme is to explore the challenges of extremely large-scale distributed architectures. Novel, multi-tier, wired and wirelessly-connected heterogeneous systems are expected; tiers may be sensor/actuator, aggregation, cloud/datacenter, or combinations thereof. All tiers are expected to be highly scalable, and heterogeneity is expected both within and across the tiers.
Dramatic advances over today’s systems (cloud, mobile, etc.) and capabilities are required. Proposers are expected to define and tackle a grand challenge in the Distributed Computing and Networking space; the grand challenge should focus attention on research issues that would benefit a broad range of civilian and defense applications (e.g. society-scale digital currencies; battlefield command-and-control in denied environments; smart grid optimization; disaster management in digital cities .
It also calls for Development of new distributed computing systems for new applications besides IoT and big data. Novel computing architectures to reduce the energy and time used to process and transport data, locally and remotely for hyperspectral sensing, data fusion, decision making, and safe effector actuation in a distributed computing environment. Provide cooperative and coordinated distributed-system concepts that are scalable and function in communications-challenged environments (where both wired and wireless environments are not guaranteed to be available, reliable, or safe); address approaches to allow for proper operation in isolation environments, and that can intelligently synchronize when communications are restored, including only partial restoration This theme will primarily focus on digital computing. All tiers are expected to be highly scalable, and heterogeneity is expected both within and across the tiers.
Under CONIX, Anthony Rowe of Carnegie Mellon University will lead researchers from seven universities to develop an architecture for networked computing that lies between edge devices and the cloud. The Internet of Things (IoT) relies on the symbiotic relationship of the cloud, edge devices, and the network however, the growing amount of IoT-generated data is straining existing networks as it moves to the cloud for processing. By building intelligence into the network, CONIX aims to rethink the current system by moving processing and decision-making out of the cloud and creating more adaptability for current and future IoT applications.
Center for Brain-inspired Computing Enabling Autonomous Intelligence (C-BRIC)
Led by Kaushik Roy of Purdue University, C-BRIC aims to deliver major advances in cognitive computing, with the goal of enabling a new generation of autonomous intelligent systems. The next wave of AI holds the promise of creating autonomous intelligent systems like self-flying drones and personal robotic assistants but will require a new type of semiconductor technology to meet the energy and computing demands required to advance beyond current machine learning applications. Researchers from nine universities will explore neuro-inspired algorithms, theories, hardware fabrics, and application drivers to achieve the center’s mission and pave the way for the AI hardware of the future.
The Cognitive Computing theme aims to create cognitive computing systems that can learn at scale, perform reasoning and decision making with purpose, and interact with humans naturally and in real-time. This theme seeks to explore multiple approaches for building machine intelligent systems with both cognitive and autonomous characteristics. Such systems can be solely non-traditional, solely von-Neumann or a combination of both elements. Realizing these novel systems may heavily leverage non-traditional computing methods, such as analog computing, stochastic computing, Shannon inspired computing, approximate computing, and bio/brain-inspired models including neuromorphic computing for a broad application space.
A key goal is creating systems that, without explicit objectives, operate in the natural world on their own by forming and extending models of the world they perceive around them, and by interacting with local human decision makers and with global distributed intelligent networks in performing actions to achieve useful yet complex goals.
A full-system approach is required to achieve the goals of this theme. In addition, the proposed research should address the technology advances that are needed for fundamental improvements in performance, capabilities, and energy efficiency through improvements in programming paradigms, algorithms, architectures, circuits, and device technologies.
Center for Research on Intelligent Storage and Processing-in-memory (CRISP)
Advances in information technology have pushed data generation rates and quantities to a point where memory and storage are the focal point of optimization of computer systems. Transfer energy, latency and bandwidth are critical to performance and energy efficiency of these systems. The solutions to many modern computing problems involve many-many relationships that can benefit from high cross-sectional bandwidth of the distributed computing platform. As an example, large scale graph analytics involve high cross-data-set evaluation of numerous neighbor relationships ultimately demanding high the highest possible cross-sectional bandwidth of the system.
This research vector seeks a holistic, vertically-integrated, approach to high-performance Intelligent Storage systems encompassing the operating system, programming models, memory management technologies, and a prototype system architecture. A primary focus area for this center will be in establishing an operating system framework allowing run-time optimization of the system based on system configuration preferences, programmer preferences, and the current state of the system.
New Architecture and Programming paradigms, Self-optimizing Systems Allowing for Appropriate Programmer Control. 10X more power efficient computing platform scalable from high performance application processors to less-demanding processors for IoT/sensors/etc. with cost awareness. Small, Probably Low Cost, Compute+Memory+Sensor Node Capable of making Basic Decisions/observations and Reporting to a Larger System.
The technology can span across material, devices, packaging, circuits/systems techniques, computer architecture including but not limited to heterogeneous computing, memory technology (including NVM) and high-speed interface (on-chip and off-chip), etc.
Led by Kevin Skadron at the University of Virginia, researchers from nine universities will work to topple the “memory wall”–a 70-year-old technical bottleneck in computer systems that is hindering the use of big data for technical discovery. Research efforts will focus on removing the separate between memory and storage that is hampering users’ abilities to access data. To accomplish this mission, CRISP researchers seek to build computer processing capabilities into memory storage at the chip level and pair processors with memory chips in 3D stacks. Once addressed, users would be able to perform previously unattainable computations on massive amounts of information, ultimately enabling rapid advances in national security, medical discovery, and beyond.
“Horizontal” Disciplinary-Focused Centers
“Horizontal” research centers will drive foundational developments in a specific discipline, or set of like-minded disciplines, will build expertise in and around key disciplinary building blocks, and create disruptive breakthroughs in areas of interest to JUMP sponsors, including advanced architectures and algorithms, and advanced devices, packaging, and materials.
These centers have a mission to identify and accelerate progress for new technologies that look beyond traditional CMOS. Proposers are expected to define a set of key metrics that their center will use to benchmark and drive efforts in their research space.
Technology areas of interest for our JUMP “horizontal” Centers include:
Applications Driving Architectures (ADA) Center
Today’s system architectures, including distributed clusters, symmetric multiprocessors (SMPs), and communications systems, are generally comprised of homogeneous hardware components that are difficult to modify once deployed. Heterogeneous architectures and elements, such as accelerators, will increasingly be needed to enable scaling of performance, energy efficiency, and cost.
This theme must lay the foundations for new paradigms in scalable, heterogeneous architectures, co-designed with algorithmic implications and vice versa. A major goal of this theme is to address the design and integration challenges of a broad variety of accelerators, both on-chip and off-chip, along with the algorithmic and system software innovations needed to readily incorporate them into both existing and future systems (e.g, information processing, communications, sensing/imaging, etc.).
Centers should address the design and integration challenges of: systems composed of on-chip and off-chip accelerators, computation in and/or near data, and non-traditional computing. Employing novel co-design to bridge the gap between architectures and algorithms for optimization, combinatorics, computational geometry, distributed systems, learning theory, online algorithms, cryptography, etc. are within scope. Benchmarking of the novel architectures is expected. Modeling and software innovations should be used to remove barriers to hardware implementation or mass adoption.
Led by Valeria Bertacco of the University of Michigan, the ADA Center aims to significantly reduce the cost, complexity, and energy required to develop advanced computing systems by democratizing the design and manufacturing process. Researchers from nine universities will work together to create a modular approach to system hardware and software design, requiring a complete rethink of the way design is done today. The expected “plug-and-play” ecosystem create by the ADA Center would help reduce the skills barrier required to develop new systems, expanding the talent pool and fostering idea generation to help propel the creation and advancement of new computing frontiers.
Applications and Systems driven Center for Energy-Efficient Integrated Nanotechnologies (ASCENT)
Energy harvesting and energy storage devices: novel materials for high efficiency energy harvesting, supercapacitors, integrated batteries, power delivery
This theme will address advanced active and passive devices, interconnect, and packaging concepts, based on physics of new materials and unconventional syntheses. This technology is needed to enable the next breakthrough paradigms in computation (including analog) and information sensing, processing, and storage that will provide further scaling and energy efficiencies. These new materials and devices will provide new functionalities and properties that can augment and/or surpass conventional semiconductor technologies, and will potentially enable novel 3D options. Material development, device demonstration and viable process integration are all within scope. Experimental demonstrations, as well as ab-initio material and process modeling, are expected.
ASCENT seeks to tackle the data-transfer bottlenecks and energy efficiency challenges associated with current electronic devices. Suman Datta of the University of Notre Dame will lead researchers from 13 universities in efforts to transcend the anticipated limits of current CMOS technology in order to increase the performance, efficiency, and capabilities of future computing systems. To achieve its goal, the center will explore four main areas of research that span novel integration schemes, innovative device technologies, and the application of hardware accelerators.
JUMP and its efforts to build-up a foundational research base in fields underlying microelectronics technologies are part of DARPA’s Electronics Resurgence Initiative (ERI). Over the next four years, the ERI will commit hundreds of millions of dollars to ensure far-reaching improvements in electronics performance well beyond the limits of traditional scaling. Central to the ERI are new forward-looking collaborations among the commercial electronics community, defense industrial base, university researchers, and the DoD. The partnerships created across industry, academia, and the defense community through JUMP are one of several critical components advancing ERI and its efforts to foster the environment needed for the next wave of U.S. semiconductor technology innovations.
References and Resources
https://researchfunding.duke.edu/jump-research-announcement
https://www.src.org/compete/jump/
https://www.darpa.mil/news-events/2018-01-17
