The explosion of connected devices and digital services is generating massive amounts of new data. Digital world is growing exponentially from 4.4 zettabytes (1021 or 1 sextillion bytes) of digital data created in 2013 to an expected 44 zettabytes by 2024. It’s far easier to generate zettabytes of data than to manufacture zettabytes of data storage capacity. A wide gap is emerging between data generation and hard drive and flash production. It is estimated that By 2020, demand for capacity will outstrip production by six zettabytes, or nearly double the demand of 2013 alone.
The researchers are looking for universal memory solution having the characteristics like high density to satisfy massive storage requirements, to be ultrafast to minimize reading and writing delays, be nonvolatile i.e. able to retain data even when power is off and consume very little power . In the effort to develop low-power data processing and storage devices, nonvolatile random access memory schemes have received considerable attention.
The Emerging non-volatile resistive memories including phase-change memory (PCM), spin-transfer torque magnetic random access memory (STT-MRAM), resistive switching RAM (RRAM), etc. are promising for storage, cache, and computing in future.
Magnetic elements such as the magnetic random access memory (MRAM) promise excellent speed, superior rewritability and small footprints, which has led to strong commercial interest in this technology for memory applications. MRAM is a nonvolatile memory, unlike DRAM, the data is not stored in an electric charge flow, but by magnetic storage elements. In general, magnetic memory works by storing binary information in the magnetic moment of a ferromagnetic material.
In addition to ferromagnetic MRAM, two complementary approaches have recently emerged for advancing beyond conventional MRAM elements in terms of its writing power and data robustness. The difference between magnetic memory technologies is the method used to switch the magnetization of the free layer. In STT-RAM, the state is switched by applying enough current through the MTJ. In MeRAM, the MTJ state is switched primarily by applying a voltage across the junction.
Both of these competing state-of-the-art non-volatile magnetic memory technologies STT-RAM and MeRAM each have the potential to become a true “universal” memory providing the speed of SRAM, the density of DRAM, and the non-volatility of Flash. This kind of memory would significantly increase performance and decrease cost and power consumption in systems that integrate multiple application specific memories.
Spintronics based Memory
Large-scale integrated (LSI) circuits are a vital constituent for current information and communication technology equipment. Progress in the LSIs have been led by development of complementary metal-oxide-semiconductor (CMOS) technology relying on Moore’s scaling law. However, the development of CMOS is now interrupted mainly by two serious issues. One is an increase of standby power and the other is Input/Output (I/O) bottleneck due to interconnection delay.
The former issue originates from the volatile nature of the current memories in the LSIs in which the standby power becomes larger due to an increase of leakage current as the CMOS technology node is advancing. The latter issue is attributed to an elongation of global wire length due to an increase of the number of integrated elements in the LSIs. To address those issues, nonvolatile (NV) memories have been attracting a great deal of attention.
Among the proposed NV memories, spintronics-based ones (magnetoresistive random access memories (MRAM)) are very attractive owing to their high-speed and low-voltage operation capability and high endurance, which are required for working memory usage. In addition to those advantages, spintronics-based memories can be implemented in back-end-of-line (BEOL), a feature which enables one to address the I/O bottleneck as global wire
length between memory and logic module can be reduced.
One advantage of spin over charge is that spin can be easily manipulated by externally applied magnetic fields, a property already in use in magnetic storage technology. Less energy is needed to change spin than to generate a current to maintain electron charges in a device, so spintronics devices use less power. Another subtler (but potentially significant) property of spin is its long coherence, or relaxation, time—once created it tends to stay that way for a long time, unlike charge states, which are easily destroyed by scattering or collision with defects, impurities or other charges.
Spintronics offers a promising solution to the major challenging issues related to the scaling of Si-based complementary metal-oxide-semiconductor (CMOS) technology because of the advantages of combing the spin and charge degrees of freedom and its ability to manipulate magnetic states in low-power-consumption ways.
One spintronic device already in use is the giant magnetoresistive, or GMR, sandwich structure, which consists of alternating ferromagnetic (that is, permanently magnetized) and nonmagnetic metal layers. Depending on the relative orientation of the magnetizations in the magnetic layers, the electrical resistance through the layers’ changes from small (parallel magnetizations) to large (antiparallel magnetizations).
The discovery of giant magnetoresistance (GMR) and tunnel magnetoresistance (TMR) allowed electrical readout of the relative orientation of magnetic moments in spin valves or magnetic tunnel devices consisting of two ferromagnetic metallic layers separated by a very thin non-magnetic metal or insulator spacer.
Investigators discovered that they could use this change in resistance (called magnetoresistance, and “giant” because of the large magnitude of the effect in this case) to construct exquisitely sensitive detectors of changing magnetic fields, such as those marking the data on a computer hard-disk platter. These disk drive read/write heads have been wildly successful, permitting the storage of tens of gigabytes of data on notebook computer hard drives, and have created a billions of dollar per year industry.
MRAM, STT-RAM and MeRAM
The two significant examples of spintronic devices and technology are non-volatile magnetic memories (MRAMs) and semiconductor spintronics. The proposed three writing schemes are spin-transfer torque (STT), spin-orbit torque (SOT), and electric field (E-field) effect on magnetic anisotropy or voltage-controlled (VC) magnetic anisotropy. The memory cell for STT-MRAM and VC-MRAM is a two-terminal structure and that for SOT-MRAM
is a three-terminal structure.
There are three types of MRAM where different writing schemes are employed. In all the MRAMs, a magnetic tunnel junction is integrated as storage element. For reading operation, tunnel magnetoresistance effect is utilized, by which two distinct resistance levels can be obtained depending on magnetization configuration for free and reference layers, parallel and antiparallel states.
The STT-MRAM is the most studied and developed MRAM and has entered the market as major semiconductor foundries have announced the starting of risk of mass production. Although the STT-MRAM is about to enter the market, the other MRAMs have been also intensively studied. This is because those two MRAMs, in principle, have higher potential in offering high-speed writing operation compared with the STT-MRAM.
The basic magnetic memory storage element is called a magnetic tunnel junction (MTJ) and its structure consists of two ferromagnetic layers separated by a thin nonconductive tunneling barrier. One of the ferromagnetic layers (called the fixed layer) has a permanent magnetization and the other layer (called the free layer) has a magnetization that is free to change.
The MTJ has two stable states: the parallel state in which the free and fixed layer magnetic moments align, and the anti-parallel state in which the free layer magnetization is in the opposite direction to that of the fixed layer. The parallel configuration results in a low MTJ resistance (denoted as RP) and the anti-parallel configuration yields a high MTJ resistance (denoted as RAP). In a well-engineered MTJ, the ratio of these two resistances is large enough to read RP as a logical zero and RAP as a logical one or vice versa.
In STT-RAM, the magnetic state of an MTJ is switched by applying a spin-polarized current through the junction. In MeRAM, the MTJ state is manipulated primarily by a voltage induced electric field.
STT-MRAM is especially promising due to its high endurance, and relative fast access time. However, STT-MRAMs suffer from challenges like high write energy and low density. The recently developed magnetoelectric random access memory (MeRAM) enables the possibility of overcoming these challenges by the use of voltage-controlled magnetic anisotropy (VCMA) effect and achieves high density, fast speed, and low energy simultaneously.
Spin Transfer Torque Random Access Memory (STT-MRAM or STT-RAM) allows fast-access, non-volatile information storage but with better scalability over traditional MRAM. Spin-transfer torque technology has the low power and low cost of flash memory, scales well below 10nm, and leverages existing CMOS manufacturing techniques and processes. Even though the STT offers a promising new mechanism and reduced cost possible for the write operation of nanomagnetic memory element it inevitably involves Joule heating and hence has high power consumption.
Electric field induced switching of magnetism, as opposed to current-driven spin transfer torque magnetization switching, can lead to a new paradigm enabling ultra-low power, highly scalable, and nonvolatile magnetoelectric random access memory (MeRAM)
‘Bending Current’ Opens Up the Way for a New Type of Magnetic Memory
In a MRAM bits are projected by the direction of the spin of the electrons in a piece of magnetic material: for example, upwards for a ‘1’ and downwards for a ‘0’. The storage of data occurs by flipping the spin of the electrons over to the correct side.
Magnetic random-access memory (MRAM) is more efficient and robust than other kinds of data storage, but switching bits still requires too much electrical power to make large-scale application practical. Eindhoven University of Technology (TU/e) researchers say they have solved this problem by using a “bending current,” an approach that flips the magnetic bits faster and more efficiently than with conventional methods.
The new method involves sending a current pulse under the bit, which bends the electrons at the correct spin upwards, and so through the bit. “It’s a bit like a soccer ball that is kicked with a curve when the right effect is applied,” says TU/e researcher Arno van den Brink.
Although the technique is exceptionally fast, it needs something to make the flipping reliable. Early attempts to do this required a magnetic field, but that made the method expensive and inefficient. The TU/e researchers say they solved this problem by applying a special anti-ferromagnetic material on top of the bits, enabling the requisite magnetic field to be frozen, achieving energy efficiency and low cost.
“This could be the decisive nudge in the right direction for superfast MRAM in the near future,” van den Brink says.
IIT Researchers Claim Breakthrough in Memory Device Technology
Researchers at IIT Roorkee have claimed to have made a breakthrough in memory device technology which, they said, usher in a new technological revolution.
A team of researchers from the Department of Physics and Centre for Nanotechnology has developed a high-density, energy-efficient and four-logic state memory device named Magnetoelectric Random Access Memory (MeRAM).
The device could provide a massive boost to the overall computing processes and memory-intensive tasks like video and multimedia signal processing, pattern recognition, virtual reality, artificial intelligence and machine learning.
“MeRAM has immense potential to be used in future memory chips for almost all electronic applications, including smart phones, tablets, computers, microprocessors, and for large data storage,” Davinder Kaur Walia, a professor at the Department of Physics and Centre for Nanotechnology, said.
The device was constructed in the Functional Nanomaterials Research Laboratory using magnetron sputtering technique, she said.
MeRAM’s key advantage over existing technologies is that it combines extraordinary low energy with very high density, high-speed reading and writing times, and non-volatility–the ability to retain data when no power is applied, Walia said.
“The world is rapidly moving towards faster, smaller and quantum technologies which has created an ever-increasing demand for small and more efficient devices and technology.
Our focus was to achieve a four-logic state as we knew that then we will be able to create a device which could probably usher in a new technological revolution,” she said.
“To achieve this, we used a new material called Ferromagnetic Shape Memory Alloys (FSMA) and the concept of composite barrier were chosen which helps us in achieving the goal of distinguishable memory logic states. The current ultimate memory cell has shown a tremendous improvement of nearly 140 per cent in the memory functions,” she added.
Magnetic memory Products
Avalanche’s STT-RAM chip
Startup Avalanche is sampling an STT-RAM chip offering DRAM/SRAM speed, persistent storage, unlimited endurance and scalability beyond 10nm. The Avalanche chip uses proprietary AvRAM technology featuring perpendicular magnetic tunnel junction (pMTJ) cells manufactured on a standard CMOS 300mm process, which it claims is high volume and low cost.
Avalanche says its pMTJ cells have a magnetic “pinned” layer, an MgO barrier layer for high and low-resistance generation, and another magnetic “storage” layer. The magnetic orientation of the pinned layer is permanently fixed during operation, while that of the storage layer is not.
Magnetisation of the storage layer changes its perpendicular direction based on the direction of the electrical current being applied and flowing through the pMTJ cell. It claims pMTJ requires less real estate than other STT-MRAM implementations, compared with current generation in-plane MTJ cell designs.
Spin Transfer Technologies announces breakthrough MRAM technology for SRAM and DRAM applications
Spin Transfer Technologies, Inc., the developer of advanced STT-MRAM for embedded SRAM and stand-alone DRAM applications, announced results of its unique Precessional Spin Current (PSC™) structure. The results from advanced testing of the PSC structure confirm that it will increase the spin-torque efficiency of any MRAM device by 40-70 percent — enabling dramatically higher data retention while consuming less power. This gain translates to retention times lengthening by a factor of over 10,000 (e.g., 1 hour retention becomes more than 1 year retention) while reducing write current. Improved efficiency is critical for enabling MRAM to replace SRAM and DRAM in mobile, datacenter and AI applications, as well as for improving retention and performance in high-temperature automotive applications. The company reported these results at the prestigious Intermag 2018 Conference.
Spin-torque efficiency is one of the core performance metrics of the pMTJ (perpendicular magnetic tunnel junction — the “bit” that stores the memory state in an MRAM memory) and is defined by the ratio between the thermal retention barrier, measuring how long data can be reliably stored in the memory, and the switching current necessary to change the value of the bit. In previous MRAM implementations, increasing the energy barrier to increase retention would require a proportional increase in write current — leading to higher power consumption and much faster wear-out of the pMTJ devices (lower endurance). The PSC structure is a breakthrough because it effectively decouples the static energy barrier that determines retention from the dynamic switching processes that govern the switching current. As a result, when the PSC structure is added to any pMTJ, benefits include:
- A higher energy barrier when the pMTJ does not have current flowing through it, which is ideal for retaining data for long periods
- An increased spin polarization when current is flowing and the device is writing a new state, which is ideal for minimizing switching current and extending the life of the device by many orders of magnitud
The PSC structure was designed from the outset to be modular and fabricated with any pMTJ — either the company’s own pMTJs, or a pMTJ from other sources. The PSC structure is fabricated during the pMTJ deposition process and adds approximately 4nm to the height of the pMTJ stack. The structure is compatible with a wide range of standard MRAM manufacturing processes, materials and tool sets — enabling any foundry to readily incorporate the PSC structure into existing pMTJ stacks without adding significant complexity or manufacturing costs.
“MRAM is attracting a lot of attention as an embedded memory for ASICs and MCUs, but issues of write current and data retention have caused concern,” said Jim Handy, general director of Objective Analysis. “Spin Transfer Technologies’ new PSC structure shows a lot of promise to solve a number of those issues and pave the path for MRAM to take a significant share of the embedded memory market.”
Spin Transfer Technologies’ testing of the PSC structure involved comparing the performance of the same pMTJ devices with and without PSC for a large number of devices within CMOS test chip arrays at various temperatures and device diameters. The tests exhibited a robust performance advantage due to the PSC structure, both during writing of the low-resistance (“0”) and the high-resistance (“1”) memory states. Some specific examples of the advantages that the data have shown are as follows:
- Increase of the spin-torque efficiency by up to 70 percent.
- Demonstration of the efficiency gain across a range of sizes (40-60nm) and temperatures (30°C to 125°C)
- Increase of the thermal energy barriers by 50 percent corresponding to an increase in data retention time of greater than four orders of magnitude while reducing the switching current.
- Reduction of read disturb error rate up to five orders of magnitude
These advantages have come without degradation to other performance parameters. The data for the PSC structure indicate significant potential for enabling high-speed applications as well as high-temperature automotive and other applications. Furthermore, since the data shows that the PSC structure’s efficiency gains actually increase as the pMTJ get smaller, the PSC structure opens new pathways to achieving embedded SRAMs in the latest 7nm and 5nm generations.
“There is a huge demand for a memory with the endurance of SRAM, but with higher density, lower operating power and with non-volatility. We believe the improvements the PSC structure brings to STT-MRAM technology will make it a highly attractive alternative to SRAM for these reasons,” said Mustafa Pinarbasi, CTO and SVP of Magnetics Technology at Spin Transfer Technologies. “We are excited to enable the next generation of STT-MRAM and to shake up the status quo of the memory industry through our innovation.”